1. Field of the Invention
This invention relates to an MNOS transistor for electric circuits, the transistor having a single channel and a layered gate insulator, and more particularly to such an MNOS transistor which is arranged on a substrate and in which the threshold voltage is variably dependent upon the electric charge stored in the insulator.
2. Description of the Prior Art
A storage arrangement of the type mentioned above is described in the publication Component Technology, vol. 4, No. 5, October 1970, PP. 17-21, in which the matrix of the storage arrangement consists of MNOS transistors.
The aforementioned type of storage arrangement, however, is subject to disadvantages. For example, for the switching of MNOS transistors during the recording of data and during the readout and erasure of data, voltages are required which have different polarities in relation to the semiconductor substrate. Therefore, in storage arrangements in the single channel technique it is necessary to construct the storage matrix and the associated decoders on separate substrates. Single channel semiconductor technique is understood to be a technique in which either only p-channel MOS field effect transistors or only n-channel MOS field effect transistors are used. Generally, only one diffusion process is required in the semiconductor substrate.